Many processing systems utilize multiple processing cores or other processing components in an effort to increase processing throughput. Communication of data among the processing components of a processing system typically is conducted via address-indexed transactions processed by a platform interconnect. As inter-component communications are conducted via these platform transactions, it typically is advantageous to configure the debugging utilities for performance characterization and parallel multi-core software functional debugging to monitor the platform transactions through the platform interconnect.
In addition to platform-level transactions for communicating between components, a processing system may implement a sub-group of hardware components directed to a specific application, such as a set of hardware accelerators directed to a particular task. To facilitate rapid processing, the components of this sub-group process data in a context-oriented manner. As such, the debugging information generated within this sub-group typically is at a higher application level and therefore difficult to relate to platform level attributes. Typically the address buffers used by the processing components of this sub-group are dynamically allocated and therefore difficult to differentiate for inclusion in a trace stream generated by a platform-level debugging utility, which typically uses the address or platform attribute information of a platform transaction to identify platform transaction information for inclusion in the trace stream. As such, the trace stream is less likely to include meaningful debugging information related to the platform transactions of the components of the application-specific sub-group and therefore will not provide the desired visibility into the performance characterization and operation of this sub-group for debugging purposes.